Efficient evaluation of arbitrary set-associative caches on multiprocessors

The authors propose a simple solution to the problem of efficient stack evaluation of LRU (least recently used) cache memories with an arbitrary two´s power set-associativity on multiprocessors. It is an extension of stack evaluation techniques for all-associativity LRU cache on a uniprocessor. Special marker entries are used in the stack to represent data pages (also called data blocks or lines) deleted by an invalidation-based cache coherence protocol. A technique of marker-splitting is used when a data page below a marker in the stack is accessed. One-pass evaluation of memory access trace will yield hit ratios for all cache sizes and set associativities on multiprocessor caches in a single pass over a memory reference trace with the use of this technique