Title :
A Processor Development in Programmable Logic Basis
Author :
Mosin, Sergey ; Kislyakov, Maxim
Author_Institution :
Comput. Eng. Dept., Vladimir State Univ. (VSU), Vladimir
Abstract :
The features of microprocessor design with specified commands set is considered. The RISC architecture for realisation was chosen. The structure of processor taking into account the architectural characteristics is described. Two possible ways of processor implementation (in basis of standard IC and FPGA) is discussed. The practical results of processor realisation in FPGA basis are described.
Keywords :
field programmable gate arrays; microcomputers; reduced instruction set computing; FPGA; RISC architecture; commands set; microprocessor design; programmable logic basis; Computer aided instruction; Computer architecture; Field programmable gate arrays; Ground penetrating radar; Microprocessors; Process design; Programmable logic arrays; Programmable logic devices; Reduced instruction set computing; Registers; FPGA; Processor design; RISC;
Conference_Titel :
CAD Systems in Microelectronics, 2007. CADSM '07. 9th International Conference - The Experience of Designing and Applications of
Conference_Location :
Lviv-Polyana
Print_ISBN :
966-533-587-0
DOI :
10.1109/CADSM.2007.4297519
