DocumentCode :
3348639
Title :
Design of FPGA-based Residue Number System Converters for Digital Signal Processing Systems
Author :
Maslennikow, Oleg ; Maslennikowa, Natalia ; Rajewska, Magdalena ; Gretkowski, Dariusz ; Lienou, Jean-Pierre
Author_Institution :
Dept. of Electron., Tech. Univ. of Koszalin, Koszalin
fYear :
2007
fDate :
19-24 Feb. 2007
Firstpage :
194
Lastpage :
201
Abstract :
In this paper, two new and simple structures of the q-operands multi-operand modular adder have been proposed, which are adapted to realization in the Xilinx FPGA devices. The main purpose of new MOMA designs has been the reduction of hardware complexity of MOMAs by means reduction of a ROM volume. New adders are used in the residue number system converters based on the current-mode gates. This technology allows on further reduction of their hardware complexity in comparison with their prototypes based on the classical CMOS gates.
Keywords :
adders; convertors; field programmable gate arrays; residue number systems; signal processing; FPGA; current-mode gate; digital signal processing; field programmable gate array; q-operands multi-operand modular adder; residue number system converters; Adders; Delay; Digital arithmetic; Digital signal processing; Field programmable gate arrays; Hardware; Inverters; Prototypes; Read only memory; Signal design; Binary to Residue and Residue to Binary Converters; Current-mode gate; FPGA (Field Programmable Gate Array); Multi-Operand Modular Adder; Residue Number System;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
CAD Systems in Microelectronics, 2007. CADSM '07. 9th International Conference - The Experience of Designing and Applications of
Conference_Location :
Lviv-Polyana
Print_ISBN :
966-533-587-0
Type :
conf
DOI :
10.1109/CADSM.2007.4297523
Filename :
4297523
Link To Document :
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