Wafer-Level Packaging Technology for 10 Gbps TOSAs

This article describes a new hermetic optoelectronics package, the Si-Paktrade optical pod. This platform technology leverages conventional silicon optical bench (SiOB) into a compact, thermally-conductive, hermetic optoelectronics package. The package offers all the features of traditional SiOB, namely reliable RF performance, efficient optical coupling, small footprint, and passive alignment. However, this new platform adds a hermetic lid directly on the SiOB, complete with hermetic RF/ DC and optical feedthroughs. Optical pods can be surface- or flex-mounted, and are ready for integration into a-final receptacle or pigtailed package. The extensive use of wafer-level processing lowers the total packaging cost-of-ownership. Packaging of optoelectronic.devices is expensive, in part due to the serial processes employed today. Operations often include multiple, manual assembly steps, leading to long cycle times, inconsistent yields, and ultimately high cost-of-ownership. As much of the semiconductor industry is moving towards wafer-level packaging to improve package performance and reduce cost, the optoelectronic packaging industry will benefit from similar evolution toward batch processing. The populated assemblies are hermetically sealed using a "lid" component wafer, which incorporates low-loss optical windows and an integrated helium leak monitor. After burn-in and test, individual optical pods are separated into sub-assemblies ready for fiber or receptacle attach. This paper discusses hermetic sealing, coupling efficiency, passive alignment, feature tolerances, and application of the technology to uncooled 10 Gbps transmitter assemblies