DocumentCode
3349856
Title
Design and Hardware Implementation of FPGA & Chaotic Encryption-based Wireless Transmission System
Author
Pan, Jing ; Qi, Na ; Xue, Bingbing ; Ding, Qun
Author_Institution
Key Lab. of Electron. Eng., Heilongjiang Univ., Harbin, China
fYear
2011
fDate
21-23 Oct. 2011
Firstpage
691
Lastpage
695
Abstract
This paper proposes a new scheme design and hardware implementation of wireless transmission system based on FPGA and chaotic encryption with A5/1 algorithm. This design uses FPGA chip as the encryption core, in which Logistic system generates the initial key and encrypts the plaintext combined with A5/1 algorithm, then it uses SIM300 module to realize wireless transmission. Develop two test boards to get hardware implementation of this design scheme, which can simulate wireless transmission of text messages and transfer data to the third one to verify its security of encrypted information. In this paper, it mainly introduces the overall design and the hardware encryption scheme of this FPGA & chaotic encryption-based wireless transmission system, and finally it shows hardware test boards and part of the test results which can confirm the feasibility of this design scheme.
Keywords
cryptography; field programmable gate arrays; logic design; radio networks; A5/1 algorithm; FPGA chip design; SIM300 module; chaotic encryption; encrypted information security; hardware encryption scheme; hardware test boards; logistic system; test boards; wireless transmission system; Algorithm design and analysis; Chaotic communication; Encryption; Field programmable gate arrays; Hardware; A5/1 algorithm; FPGA; chaotic stream cipher encryption; text encryption;
fLanguage
English
Publisher
ieee
Conference_Titel
Instrumentation, Measurement, Computer, Communication and Control, 2011 First International Conference on
Conference_Location
Beijing
Print_ISBN
978-0-7695-4519-6
Type
conf
DOI
10.1109/IMCCC.2011.176
Filename
6154201
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