Title :
A reconfigurable data path processor
Author :
Maki, G. ; Whitaker, S. ; Ganesh, G.
Author_Institution :
NASA Space Eng. Res. Center for VLSI Syst. Design., Idaho Univ., Moscow, ID, USA
Abstract :
A configurable data path processor is presented which can be modified to optimize performance. FPGA, PLA and PAL devices provide a great amount of flexibility to realize arbitrary control functions. The new processor is specifically designed for arbitrary data path operations and can be dynamically reconfigured
Keywords :
microprocessor chips; parallel architectures; pipeline processing; FPGA; PAL; PLA; field programmable gate arrays; reconfigurable data path processor; Computer architecture; Field programmable gate arrays; Hardware; Logic circuits; Logic design; Logic devices; Process design; Programmable control; Programmable logic arrays; Reconfigurable logic;
Conference_Titel :
ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0101-3
DOI :
10.1109/ASIC.1991.242870
