• DocumentCode
    3349993
  • Title

    A PLA emulation laboratory

  • Author

    Ziegler, William L.

  • Author_Institution
    Dept. of Comput. Sci., Thomas J. Watson Sch. of Eng. & Appl. Sci., State Univ. of New York, Binghamton, NY, USA
  • fYear
    1991
  • fDate
    23-27 Sep 1991
  • Lastpage
    38108
  • Abstract
    In a typical undergraduate logic design course, programmable logic arrays, (PLAs) are usually a non-trivial topic of discussion. PLA design and PLA programming concepts are very likely to be discussed at length in the classroom. Most logic design courses have a corresponding laboratory component and most classroom topics are reinforced in the laboratory. An exception to this is the PLA and other programmable hardware devices. PLA´s are typically not presented in laboratory settings. The reason for this omission is likely to be the lack of ability to program PLAs due to the hardware configurations of typical undergraduate logic design laboratories. The author discusses the issue of PLA omission from the typical undergraduate logic design laboratory. Then he describes a PLA emulation laboratory that can be performed in the typical laboratory using only basic logic gates. The emulated PLA is not only built by students in the laboratory but also programmed and reprogrammed by students as well
  • Keywords
    PLD programming; computer science education; educational courses; logic arrays; logic design; PLA emulation laboratory; PLA programming; programmable logic arrays; undergraduate logic design course; Digital systems; Emulation; Hardware; Laboratories; Logic design; Logic programming; Minimization; Programmable logic arrays; Read only memory; Sequential circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
  • Conference_Location
    Rochester, NY
  • Print_ISBN
    0-7803-0101-3
  • Type

    conf

  • DOI
    10.1109/ASIC.1991.242874
  • Filename
    242874