Title :
PLDs ease multiprocessor system design
Author :
Casey, John ; Scheer, Dave
Author_Institution :
Intel Corp., Folsom, CA, USA
Abstract :
Highlights the advantages of using programmable logic devices in common-bus multiprocessor designs. This discussion is limited to common-bus architectures due to their popularity. The processors used in common-bus architectures can be tightly-coupled (communication via shared memory) or loosely coupled (communication via message-passing bus network)
Keywords :
PLD programming; logic arrays; multiprocessor interconnection networks; common-bus architectures; common-bus multiprocessor designs; multiprocessor system design; programmable logic devices; Bandwidth; Clocks; Computer architecture; Hardware; Logic design; Microprocessors; Multiprocessing systems; Network topology; Programmable logic devices; Random access memory;
Conference_Titel :
ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0101-3
DOI :
10.1109/ASIC.1991.242881
