• DocumentCode
    3350147
  • Title

    An example of balanced truncation method and its surprising time domain performance

  • Author

    Wang, Sheng-Guo ; Wang, Ben

  • Author_Institution
    Dept. of ET, Univ. of North Carolina, Charlotte, NC
  • fYear
    2008
  • fDate
    21-24 Sept. 2008
  • Firstpage
    823
  • Lastpage
    828
  • Abstract
    This paper presents an example of using the balanced truncation method (BTM) for a distributed RLC interconnect model reduction. The example shows a surprising result and some possible hidden phenomenon in model reduction methods. We find that a high order BTM model has much worse performance than a low order BTM model, in view of the original model and their step responses in the time domain. This unexpected finding contradicts to our common expectation from the well-known approximation error upper bound results of the BTM in frequency domain. It reveals a fact that though the high order system keeps more states than the low order system, the approximation error behavior in the time domain may be totally different from its counterpart in the frequency domain. In addition, the paper also presents a closed form of the state space model for general evenly distributed RLC interconnect line circuits. The closed form has a very low computation complexity of O(1), which may be extended for use not only in circuits, but also in various complex systems with transmission lines, networks, or delay lines. Since the BTM is a popular practical model reduction method in various areas, thus this example may bring some further insight thinking for development.
  • Keywords
    RLC circuits; computational complexity; frequency-domain analysis; integrated circuit interconnections; time-domain analysis; balanced truncation method; complex systems; computation complexity; distributed RLC interconnect model reduction; frequency domain; high order system; low order system; model reduction methods; time domain performance; transmission lines; Approximation error; Computer networks; Delay lines; Distributed parameter circuits; Frequency domain analysis; Integrated circuit interconnections; RLC circuits; Reduced order systems; State-space methods; Upper bound; balanced truncation method; complex system; example; model reduction error; time domain performance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Cybernetics and Intelligent Systems, 2008 IEEE Conference on
  • Conference_Location
    Chengdu
  • Print_ISBN
    978-1-4244-1673-8
  • Electronic_ISBN
    978-1-4244-1674-5
  • Type

    conf

  • DOI
    10.1109/ICCIS.2008.4670791
  • Filename
    4670791