CAE techniques for GaAs ASIC design

Author

Woodruff, D.C. ; Ling, L. ; Shen, E.K. ; Davidovich, E. ; Rofougaran, A. ; Lee, F.S.

Author_Institution

GigaBit Logic Inc., Newbury Park, CA, USA

fYear

1991

fDate

23-27 Sep 1991

Lastpage

37987

Abstract

Discusses CAE techniques which have been utilized in applying `standard´ CAE tools to a somewhat nonstandard design situation-the creation of extremely high-speed digital integrated circuits on gallium arsenide substrates. This paper will concentrate chiefly on those aspects which are unique to this endeavor-the extremely high edge and data rates, for example-and the behaviors of the standard tools, which, adequate or useful for moderate speed silicon designs, have become stumbling blocks to designing GaAs ICs

Keywords

CAD/CAM; III-V semiconductors; application specific integrated circuits; circuit analysis computing; circuit layout CAD; digital integrated circuits; field effect integrated circuits; gallium arsenide; CAE techniques; GaAs; GaAs ASIC design; extremely high-speed digital integrated circuits; semiconductors; Application specific integrated circuits; Computer aided engineering; Digital integrated circuits; Gallium arsenide; High speed integrated circuits; Packaging; Semiconductivity; Silicon; Substrates; Very high speed integrated circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International

Conference_Location

Rochester, NY

Print_ISBN

0-7803-0101-3

Type

conf

DOI

10.1109/ASIC.1991.242890

Filename

242890