Title :
A 13-bit cell for mixed signal ASIC designs
Author :
Mohajeri, Hessam ; Michel, Jean-Yves
Author_Institution :
National Semiconductor Corp., Santa Clara, CA, USA
Abstract :
The following paper describes a 12bit+sign charge redistribution ADC for ASIC applications. The ADC is totally self contained and does not require any trimming of the capacitor array. Special techniques have been used to make the ADC more immune to noise sources and to preserve the accuracy of the cell inside the high speed digital environment
Keywords :
CMOS integrated circuits; analogue-digital conversion; mixed analogue-digital integrated circuits; 1.5 micron; 13 bit; 13-bit cell; CMOS digital process; capacitor array; fully differential architecture; high speed digital environment; mixed signal ASIC designs; noise immunity; sign charge redistribution ADC; Application specific integrated circuits; Calibration; Capacitors; Error correction; Phased arrays; Rails; Semiconductor device noise; Signal design; Voltage; Working environment noise;
Conference_Titel :
ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0101-3
DOI :
10.1109/ASIC.1991.242917
