Title :
Improved DC matching of CMOS circuits using Rotational Symmetry
Author :
Gabara, T.J. ; Metz, P.C.
Author_Institution :
AT&T Bell Labs., Allentown, PA, USA
Abstract :
A layout technique called Rotational Symmetry has reduced the DC output voltage level variation of CMOS 100K ECL output buffers. Unlike the Common Centroid layout method, Rotational Symmetry compensates for process variations which cause voltage mismatches between distantly placed coupled buffers. This layout technique is also invariant to 90° rotations
Keywords :
CMOS integrated circuits; buffer circuits; circuit layout; emitter-coupled logic; CMOS circuits; DC matching; DC output voltage level variation; ECL output buffers; Rotational Symmetry; distantly placed coupled buffers; layout technique; voltage mismatches; Coupling circuits; DC generators; Etching; Impedance; Laboratories; Resistors; Semiconductor device measurement; Signal generators; Variable structure systems; Voltage;
Conference_Titel :
ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0101-3
DOI :
10.1109/ASIC.1991.242918
