DocumentCode :
3350909
Title :
VHDL-A management overview
Author :
Bettadapur, Dinesh
Author_Institution :
CAD Language Systems Inc., Rockville, MD, USA
fYear :
1991
fDate :
23-27 Sep 1991
Lastpage :
40179
Abstract :
The tutorial begins with an outline of the motivation for the development of VHDL. The problems of parts obsolescence and system complexity are enunciated and a hardware description language is proposed as a means of overcoming the problems. There is a demonstration of VHDL meeting the requirements of a HDL namely-communication, modeling capabilities, and semantic completeness. The modeling capabilities of VHDL are brought out through a set of examples. Next, the evolution of VHDL is traced. Next, there is a broad treatment of the various IEEE forums involved in the continuing development of the language. The focus of these groups in promoting the use and understanding of the language, examining aspects such as intermediate format, modeling, standards, and test vector generation, correcting existing anomalies and introducing extensions for synthesis and analog simulation, is brought out. Finally, a detailed overview of the currently available VHDL products is provided
Keywords :
VLSI; application specific integrated circuits; digital integrated circuits; reviews; specification languages; IEEE forums; VHDL; VHDL products; communication; correcting existing anomalies; development; evolution; extensions; hardware description language; intermediate format; management overview; modeling capabilities; modeling, standards; parts obsolescence; requirements; semantic completeness; system complexity; test vector generation; tutorial; Hardware design languages; Military standards; Standardization; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0101-3
Type :
conf
DOI :
10.1109/ASIC.1991.242934
Filename :
242934
Link To Document :
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