Title :
Understanding PLD parameter specifications
Author :
Casey, John ; Scheer, David
Author_Institution :
Intel Corp., Folsom, CA, USA
Abstract :
Discusses issues of current PLD parameter specification. It covers two specific areas; standardization of PLD specifications and data that could be provided to enhance designers knowledge
Keywords :
logic arrays; logic design; standardisation; PLD parameter specifications; knowledge enhancement; logic design; standardization; Circuits; Cities and towns; Clocks; Flip-flops; Frequency; Programmable logic devices; Standardization; Temperature; Time to market; Timing;
Conference_Titel :
ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0101-3
DOI :
10.1109/ASIC.1991.242953
