DocumentCode
3351892
Title
The effectiveness of the scan test and its new variants
Author
Van de Goor, Ad J. ; Hamdioui, Said ; AL-Ars, Zaid
Author_Institution
Fac. of Electr. Eng., Math. & Comput. Sci., Delft Univ. of Technol., Netherlands
fYear
2004
fDate
9-10 Aug. 2004
Firstpage
26
Lastpage
31
Abstract
Many industrial experiments have shown that the very simple and time-efficient Scan test detects many unique faults. This paper shines a new light on the properties of Scan test; such properties will be evaluated using industrial data. In addition, it will be shown that many faults in a memory, which are not in the cell array, are detectable using the appropriate read-write sequences. The traditional version of Scan test performs ´some´ of such read-write sequences, but lacks the capability of performing all of them for both the ´up´ and the ´down´ address orders and the ´0´ and the ´1´ data values. Therefore a new set of scan based tests are proposed to fill that vacuum.
Keywords
boundary scan testing; integrated circuit testing; memory architecture; cell array; industrial data; industrial experiments; memory faults; read-write sequences; time-efficient scan test; Circuit faults; Circuit testing; Computer science; Electrical fault detection; Fault detection; Laboratories; Mathematics; Performance evaluation; Random access memory; Stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Technology, Design and Testing, 2004. Records of the 2004 International Workshop on
ISSN
1087-4852
Print_ISBN
0-7695-2193-2
Type
conf
DOI
10.1109/MTDT.2004.1327980
Filename
1327980
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