DocumentCode
3352148
Title
Design of Dual-Processor Sharing DRAM Controller
Author
Bo, Zhang ; Gang, Zhang
Author_Institution
Coll. of Inf. Eng., Taiyuan Univ. of Technol., Taiyuan, China
Volume
2
fYear
2009
fDate
28-30 Oct. 2009
Firstpage
298
Lastpage
302
Abstract
Sharing memory module is widely used in dual-processor system. This paper presents two schemes of dual-processor sharing DRAM. One is Dual-port Single Memory Controlling (DSMC) system and the other is Dual-port Pair of Symmetric Memory Controlling (DPMC) system, by which the dual-processor can access the shared DDR SDRAM simultaneously and without collision. The DSMC system utilizes a single DRAM as the sharing memory and the DPMC system utilizes a pair of DRAM as the sharing memory. Therefore, the Symmetric Multi-Processor (SMP) structure can utilize high-density, low-price DDR SDRAM as the shared memory to improve the system performance significantly. The two schemes are verified with the FPGA in Xilinx EDK platform.
Keywords
DRAM chips; integrated circuit design; shared memory systems; DSMC system; dual-port pair; dual-port single memory controlling system; dual-processor sharing DRAM controller; dual-processor system; memory module sharing; shared DDR SDRAM; sharing memory; symmetric memory controlling system; symmetric multiprocessor structure; Control systems; DRAM chips; Design engineering; Educational institutions; Field programmable gate arrays; Logic; Message passing; Paper technology; Random access memory; SDRAM; SMP; dual-port DDR controller; dual-processor; sharing memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Science and Engineering, 2009. WCSE '09. Second International Workshop on
Conference_Location
Qingdao
Print_ISBN
978-0-7695-3881-5
Type
conf
DOI
10.1109/WCSE.2009.817
Filename
5403293
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