Development of lamination process for chip-in-substrates

Fiber-reinforced composites are used as insulating layers in PCBs to reduce thermal residual stress and warpage due to their low coefficient of thermal expansion (CTE) and high elastic modulus. The composite prepreg is laminated on patterned copper layers by hot-press molding process to apply temperature and pressure cycles. In this study, the lamination process of glass/epoxy woven composite in the chip- embedded PCB was investigated in order to manufacture reliable chip-embedded PCB. Temperature profiles in several panels stacked in the hot-press were measured to estimate degree of cure and resin-fill characteristics. The degree of cure was evaluated by a cure kinetic model constructed from dynamic and isothermal differential scanning calorimetry (DSC), while the resin flow through via holes and around embedded chips was analyzed by a viscosity model constructed from isothermal rheometry.