Associative memory design for the fast track processor (FTK) at ATLAS

Author

Annovi, A. ; Beccherle, R. ; Beretta, M. ; Bossini, E. ; Crescioli, F. ; Dell´Orso, M. ; Giannetti, P. ; Hoff, J. ; Liu, T. ; Liberali, Y. ; Sacco, I. ; Schoening, A. ; Soltveit, H.K. ; Stabile, A. ; Tripiccione, R. ; Volpi, G.

Author_Institution

Ist. Naz. di Fis. Nucleare, Lab. Naz. di Frascati, Frascati, Italy

fYear

2011

fDate

23-29 Oct. 2011

Firstpage

141

Lastpage

146

Abstract

We propose a new generation of VLSI processors for pattern recognition, based on associative memory architecture, optimized for online track finding in high-energy physics experiments. We describe the architecture, the technology studies and the prototype design of a new associative memory project: it maximizes the pattern density on the ASIC, minimizes the power consumption and improves the functionality for the fast tracker processor proposed to upgrade the ATLAS trigger at LHC.

Keywords

VLSI; application specific integrated circuits; content-addressable storage; memory architecture; nuclear electronics; pattern recognition; position sensitive particle detectors; silicon radiation detectors; trigger circuits; ASIC; ATLAS trigger system; LHC; VLSI processor; associative memory architecture; associative memory design; associative memory project; fast track processor; high-energy physics experiment; pattern density; pattern recognition; power consumption rate; silicon vertex tracker; Prototypes; Resistance;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), 2011 IEEE

Conference_Location

Valencia

ISSN

1082-3654

Print_ISBN

978-1-4673-0118-3

Type

conf

DOI

10.1109/NSSMIC.2011.6154467

Filename

6154467