The VLSI Circuital Scheme of Generalized Cellular Automata for Parallel Optimization

This paper presents a VLSI circuital implementation scheme of generalized cellular automata (GCA) for parallel optimizations. The GCA approach and architecture has been effectively used to solve a class of optimization problems, such as the travelling salesmen problem (TSP) and the fast packet switching problem (FPSP). In contrast to the Hopfield-type neural network (HNN) and cellular neural network (CNN), the proposed GCA is featured by multigranularity macro-cells and their evolutionary dynamics. The GCA architecture and its hardware implementation scheme has advantages over the HNN and CNN methods in terms of the real-time performance, interconnection complexity, and parameter decision