• DocumentCode
    3354248
  • Title

    Trade-off analysis of decoding algorithms and architectures for multi-standard LDPC decoder

  • Author

    Priewasser, Robert ; Huemer, Mario ; Bougard, Bruno

  • Author_Institution
    Embedded Syst. & Signal Process., Klagenfurt Univ., Klagenfurt
  • fYear
    2008
  • fDate
    8-10 Oct. 2008
  • Firstpage
    88
  • Lastpage
    93
  • Abstract
    Since Low-Density Parity-Check (LDPC) codes deliver excellent decoding performance, they are adopted in several recent communication standards like the IEEE 802.11n, IEEE 802.16e and DVB-S2. This raises the need for multi-standard, multi-mode decoder architectures. In this paper we propose to use the min-sum approximation together with a turbo-like decoding approach for decoding LDPC codes, and afterwards we perform a global trade-off analysis which enables the designer to choose the appropriate decoding algorithm.
  • Keywords
    approximation theory; decoding; parity check codes; DVB-S2; IEEE 802.11n; IEEE 802.16e; decoding algorithms; low-density parity-check codes; min-sum approximation; multimode decoder architectures; multistandard LDPC decoder; trade-off analysis; Algorithm design and analysis; Application specific processors; Communication standards; Computer architecture; Forward error correction; Iterative decoding; Parity check codes; Performance analysis; Signal processing algorithms; Throughput; LDPC; SDR; fixed-point refinement; forward error correction; trade-off analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing Systems, 2008. SiPS 2008. IEEE Workshop on
  • Conference_Location
    Washington, DC
  • ISSN
    1520-6130
  • Print_ISBN
    978-1-4244-2923-3
  • Electronic_ISBN
    1520-6130
  • Type

    conf

  • DOI
    10.1109/SIPS.2008.4671743
  • Filename
    4671743