• DocumentCode
    3354467
  • Title

    On the verification of multi-standard SoC’S for reconfigurable video coding based on algorithm/architecture co-exploration

  • Author

    Lee, Gwo Giun ; Lin, He-Yuan ; Wang, Ming-Jiun ; Chen, Bo-Han ; Cheng, Yuan-Long

  • Author_Institution
    Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan
  • fYear
    2008
  • fDate
    8-10 Oct. 2008
  • Firstpage
    170
  • Lastpage
    175
  • Abstract
    Based on concurrent exploration of both algorithm and architecture, this paper introduces an efficient verification methodology that targets at comprehensive functional verification throughout different levels of design granularities for multi-format media SoCpsilas with applications in MPEGpsilas Reconfigurable Video Coding. We present a verification technique that minimizes the number of test patterns but at the same time covering multiple profiles based on the functional commonalities extracted from multiple coding standards. In addition, algorithmic complexity analysis and dataflow modeling are also used to gain insight into flexible video architecture at early design stage in facilitating more efficient verification environment. Furthermore, an isolation technique is also presented for independent verification of coarse grain modules in the system level. We have shown that this verification methodology can effectively enhance the reliability and efficiency of SoCpsilas with high complexity and reconfigurability.
  • Keywords
    data flow graphs; system-on-chip; video coding; algorithmic complexity analysis; dataflow modeling; design granularities; flexible video architecture; functional verification; multistandard SOC; reconfigurable video coding; Algorithm design and analysis; Automatic voltage control; Code standards; Codecs; Decoding; Entropy; MPEG standards; Signal processing algorithms; Testing; Video coding; SoC; electronic system level; reconfigurable video coding; verification;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing Systems, 2008. SiPS 2008. IEEE Workshop on
  • Conference_Location
    Washington, DC
  • ISSN
    1520-6130
  • Print_ISBN
    978-1-4244-2923-3
  • Electronic_ISBN
    1520-6130
  • Type

    conf

  • DOI
    10.1109/SIPS.2008.4671757
  • Filename
    4671757