Title :
Latent design faults in the development of Multiflow´s TRACE/200
Author_Institution :
Intel Corp., Hillsboro, OR, USA
Abstract :
The author recounts some of the more notable design faults that appeared during the development of the Multiflow TRACE/200 series of minisupercomputers. During development of the TRACE, the design errors found appeared to be largely random and uncorrelated. However, it appears that a fairly small set of categories can nearly span the set. These faults fall roughly into a few categories: interface misassumptions, stale-instructions-in-cache, parity-related, designer errors, CAD tools, and parts with defective designs. Specific examples are given for each category, and corrections for these design flaws are mentioned.<>
Keywords :
computer testing; minicomputers; CAD tools; Multiflow TRACE/200; VLIW; defective designs; design faults; design flaws; designer errors; interface misassumptions; minisupercomputers; parity-related; stale-instructions-in-cache; Circuit faults; Computer bugs; Computer errors; Design automation; Hardware; Job shop scheduling; Parallel processing; Processor scheduling; Timing; VLIW;
Conference_Titel :
Fault-Tolerant Computing, 1992. FTCS-22. Digest of Papers., Twenty-Second International Symposium on
Conference_Location :
Boston, MA, USA
Print_ISBN :
0-8186-2875-8
DOI :
10.1109/FTCS.1992.243587
