• DocumentCode
    3354861
  • Title

    More robust tests in algorithm-based fault-tolerant matrix multiplication

  • Author

    Assad, F.T. ; Dutt, S.

  • Author_Institution
    Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN, USA
  • fYear
    1992
  • fDate
    8-10 July 1992
  • Firstpage
    430
  • Lastpage
    439
  • Abstract
    The authors propose a novel algorithm-based testing scheme for matrix multiplication that supplements the standard sum test. An integer-based equality test is presented for matrix multiplication that is able to detect up to three errors in the scalar floating-point multiplication component of the computation. They present schemes that augment this integer-based test by a floating-point equality test so that errors in the floating-point addition component of matrix multiplication are also covered. As shown by simulation results, the hybrid testing method is much more accurate in detecting errors than previous floating-point equality tests with thresholding. A small architectural change is suggested in the floating-point multiplication unit that restricts the time overhead of the scheme to only 18% over that of the simple floating-point equality test.<>
  • Keywords
    error analysis; fault tolerant computing; matrix algebra; algorithm-based fault-tolerant matrix multiplication; floating-point addition; integer-based equality test; matrix multiplication; scalar floating-point multiplication; standard sum test; Computational modeling; Electrical fault detection; Error correction; Fault detection; Fault tolerance; Fault tolerant systems; Hardware; Robustness; Roundoff errors; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Fault-Tolerant Computing, 1992. FTCS-22. Digest of Papers., Twenty-Second International Symposium on
  • Conference_Location
    Boston, MA, USA
  • Print_ISBN
    0-8186-2875-8
  • Type

    conf

  • DOI
    10.1109/FTCS.1992.243592
  • Filename
    243592