Integrated prepass scheduling for a Java just-in-time compiler on the IA-64

Author

Inagaki, Tatsushi ; Komatsu, Hideaki ; Nakatani, Toshio

Author_Institution

Tokyo Res. Lab., IBM Japan Ltd., Japan

fYear

2003

fDate

23-26 March 2003

Firstpage

159

Lastpage

168

Abstract

We present a new integrated prepass scheduling (IPS) algorithm for a Java just-in-time (JIT) compiler which integrates register minimization into list scheduling. We use backtracking in the list scheduling when we have used up all the available registers. To reduce the overhead of backtracking, we incrementally maintain a set of candidate instructions for undoing scheduling. To maximize the ILP after undoing scheduling, we select an instruction chain with the smallest increase in the total execution time. We implemented our new algorithm in a production-level Java JIT compiler for the Intel Itanium processor. The experiment showed that, compared to the best known algorithm by Govindarajan et al., our IPS algorithm improved the performance by up to +1.8% while it reduced the compilation time for IPS by 58% on average.

Keywords

Java; microprocessor chips; optimising compilers; parallelising compilers; performance evaluation; processor scheduling; IA-64; ILP maximization; IPS algorithm; Intel Itanium processor; JIT compiler; Java; backtracking; candidate instructions; compilation time; instruction chain; integrated prepass scheduling; just-in-time compiler; list scheduling; performance; production-level compiler; register minimization; total execution time; Java; Optimizing compilers;

fLanguage

English

Publisher

ieee

Conference_Titel

Code Generation and Optimization, 2003. CGO 2003. International Symposium on

Print_ISBN

0-7695-1913-X

Type

conf

DOI

10.1109/CGO.2003.1191542

Filename

1191542