Exploring CAM Design For Network Processing Using FPGA Technology

Content Addressable Memory (CAM) is becoming increasingly important in the area of communication systems design. This paper investigates a number of CAM designs suitable for implementation on FPGA. Three fundamental designs are examined based on registers, RAM blocks and LUTs. The designs are synthesized with speed and area costs presented and evaluated. This shows how CAMs can be designed for use in FPGA’s in small to medium size applications where a CAM is otherwise unavailable.