• DocumentCode
    3355112
  • Title

    Design of static CMOS self-checking circuits using built-in current sensing

  • Author

    Lo, J.-C. ; Daly, J.C. ; Nicolaidis, M.

  • Author_Institution
    Dept. of Electr. Eng., Rhode Island Univ., Kingston, RI, USA
  • fYear
    1992
  • fDate
    8-10 July 1992
  • Firstpage
    104
  • Lastpage
    111
  • Abstract
    The authors present a novel scheme for implementing self-checking circuits in static CMOS. A strongly code disjoint (SCD) built-in current sensor (BICS) is presented. It is used to cover faults whose detection cannot be guaranteed by logic monitoring. A previously fabricated and tested high-speed BICS is examined for its behavior in the presence of faults. Then, a self-exercising mechanism is designed to obtain the SCD property. The integration of this SCD BICS with a self-checking circuit achieves the well-known goal of total self-checking.<>
  • Keywords
    CMOS integrated circuits; built-in self test; integrated logic circuits; logic testing; built-in current sensing; logic monitoring; self-exercising mechanism; static CMOS self-checking circuits; strongly code disjoint; total self-checking; Built-in self-test; CMOS logic circuits; Circuit faults; Circuit testing; Electrical fault detection; FETs; Fault detection; Integrated circuit reliability; Mechanical factors; Monitoring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Fault-Tolerant Computing, 1992. FTCS-22. Digest of Papers., Twenty-Second International Symposium on
  • Conference_Location
    Boston, MA, USA
  • Print_ISBN
    0-8186-2875-8
  • Type

    conf

  • DOI
    10.1109/FTCS.1992.243610
  • Filename
    243610