DocumentCode
3355598
Title
Prototyping the DLX microprocessor
Author
Fagin, Barry ; Chintrakulchai, Pichet
Author_Institution
Thayer Sch. of Eng., Dartmouth Coll., Hanover, NH, USA
fYear
1992
fDate
23-25 Jun 1992
Firstpage
127
Lastpage
137
Abstract
The prototyping of a functioning DLX microprocessor, based on the 32-b instruction set architecture developed by D. Patterson and J. Hennessy (in Computer Architecture: A Quantitative Approach, 1990), is described. This architecture is an emerging academic standard but has yet to be successfully prototyped. An implementation of DLX as a 12-in×15-in two-layer circuit board, containing 59 chips and running on a 2-MHz clock, is described. The execution of DLX programs and the problems encountered are discussed
Keywords
instruction sets; microcomputers; microprocessor chips; software prototyping; DLX microprocessor; DLX programs; academic standard; clock; instruction set; prototyping; two-layer circuit board; Design engineering; Digital systems; Hardware; Laboratories; Microprocessors; Packaging; Printed circuits; Process design; Prototypes; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
Rapid System Prototyping, 1992. Shortening the Path from Specification to Prototype, 1992 International Workshop on
Conference_Location
Research Triangle Park, NC
Print_ISBN
0-8186-3520-7
Type
conf
DOI
10.1109/IWRSP.1992.243912
Filename
243912
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