Integration issues of Crx(SiO)1-x on-chip resistors

On-chip passives are the best solution for very high component density with increased electrical performance, improved reliability, reduced size, weight and lower cost. The on-chip passives and elimination of surface mount technology will lead to the reduction of overall part count, elimination of solder joints, improvement of wireability, and improved high frequency behavior due to reduction of parasitic inductance. High resistivity on-chip resistor is crucial for low power applications, such as implantable medical devices and portable electronic devices. Cr_x(SiO)_1-x system is a cermet material, which can be deposited as an on-chip thin film resistor with the highest resistivity among all the thin film resistor materials. Two of the main challenges for on-chip resistor manufacturing are 1) compatibility to the planar silicon process and 2) reproducibility. Among all the factors that affect the compatibility and reproducibility, substrate effect and contact resistance are two significant and important one because different materials, such as thermally grown SiO₂, CVD deposited Si₃N₄, PSG, and BPSG, is used as substrates for the resistor films. And different metal, such as AlCuSi, Ti, and TiW are used as metallization materials. In this study the effects of different contact metal materials and processing parameters on the metal/resistor contact resistance were investigated. A bipolar process is used to fabricate aluminum to Cr_x(SiO)_1-x contact, and a 0.6 mm BiCMOS process is used to fabricate Titanium to Cr_x(SiO)_1-x contact. TEM and AFM were used to study the morphological and metallurgical changes prior and post annealing. The study shows that 1) Ti contact has lower contact resistance and higher stability compared to AlCuSi contact. 2) The main factor on AlCuSi contact is the Al-Si alloy formation on the AlCuSi/ Cr_x(SiO)_1-x contact. A TEM image of AlCuSi/ Cr_x(SiO)_1-x contact post 450C/30 min anneal is shown.