High-performance multiqueue buffers for VLSI communication switches

A type of buffer called a dynamically allocated multiqueue (DAMQ) buffer, designed for use in n×n switches, is presented. This buffer provides efficient handling of variable-length packets and the forwarding of packets in non-FIFO (first-in-first-out) order. The microarchitecture of the DAMQ buffer and its controller is described in the context of the ComCoBB communication coprocessor for multicomputers. The DAMQ buffer can be efficiently implemented in LVSI to support packet transmission and reception at the rate of one byte per clock cycle. With a hardwired linked-list manager and a fast-routing mechanism, the ComCoBB chip will support virtual cut-through of messages with a latency of four cycles. The performance of the DAMQ buffer is compared with that of three alternative buffers in the context of a multistage interconnection network. Simulations show that for uniform traffic the DAMQ buffer results in significantly lower latencies and higher maximal throughput than other designs with the same total buffer storage capacity