A novel space-vector modulation technique for common mode emissions reduction

Common mode currents must be limited in order to increase reliability and electromagnetic compatibility of electric drives. In the present paper, the choice of the switching patterns is performed according to the sign of the load currents. A simple strategy is proposed in which, by using only-odd or only-even switching states, it is possible to reduce the common mode voltage variations to a single pulse per switching period. Moreover, with the introduction of a special notch in the gate signals, such a pulse can be partially or totally erased by obtaining no common mode currents in the drive. Simulations and experimental tests are presented that have been performed on a three-phase PWM induction motor drive, using a Xilinx FPGA to implement the proposed modulation strategy.