• DocumentCode
    3356599
  • Title

    Multi-flip chip on lead frame overmolded IC package: a novel packaging design to achieve high performance and cost effective module package

  • Author

    Kim, Jinbum ; Noquil, Jonathan A. ; Tan, Teik Keng ; Wu, Chung-Lin ; Choi, Seung-Yong

  • Author_Institution
    Package Knowledge Center, Fairchild Semicond. Corp., Gyunggi-do, South Korea
  • fYear
    2005
  • fDate
    31 May-3 June 2005
  • Firstpage
    1819
  • Abstract
    Miniaturization reduces package size, cost and board space. System on Chip (SoC) integrates a system on a common silicon substrate, however there are some shortcomings with this approach such as high manufacturing cost. Handling of different levels of voltage and current on a common silicon substrate with controller IC operating in the range of several volts and milliamps, while power MosFETs at over hundreds of volts and more dozens of amps can also pose as an issue. Nevertheless, module packages having controller IC and power MosFET co-packaged are new. Fairchild semiconductor´s advancement in packaging has eliminated these drawbacks with the introduction of multi-flip chip on lead frame over-molded IC package. This new package has a novel packaging concept that uses multi-flip chip technology on the power devices combined with controller IC employing wire bonding technique on one copper lead frame based substrate. The gate and source in power MosFETs are bumped and attached to the copper lead frame by flip chip bonding technology and are routed out of package by solder balls while the drain exposed at the bottom of the package is soldered directly to the board. This is a BGA package with exposed die back for drain. The paper describes the construction of multi-flip chip on lead frame over molded package in Fairchild Semiconductor, its cost effective package designs and manufacturing challenges.
  • Keywords
    cost reduction; flip-chip devices; integrated circuit design; integrated circuit packaging; power MOSFET; substrates; system-on-chip; BGA package; Fairchild Semiconductor; controller IC; copper lead frame based substrate; cost effective module package; integrated circuit packaging design; manufacturing cost; miniaturization; multi-flip chip; overmolded IC package; package size; power MosFET; silicon substrate; solder balls; system on chip; wire bonding technique; Bonding; Copper; Costs; Integrated circuit packaging; Lead compounds; MOSFETs; Semiconductor device packaging; Silicon; Substrates; System-on-a-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2005. Proceedings. 55th
  • ISSN
    0569-5503
  • Print_ISBN
    0-7803-8907-7
  • Type

    conf

  • DOI
    10.1109/ECTC.2005.1442043
  • Filename
    1442043