Winner-take-all class AB input stage: a novel concept for low-voltage power-efficient class AB amplifiers

A technique for implementing class AB differential input stages is proposed. It is well suited for low voltage operation, and can be applied to single-stage or two-stage OTAs in continuous time or sampled-data systems. In order to illustrate this approach an OTA is presented, combining the input stage proposed and local common-mode feedback with two-resistors to obtain high slew rate and very low static power consumption. Measurement results from a 0.5-μm CMOS implementation with supply voltages of ±1 V show a slew rate of 50V/μs for an 80-pF load capacitance, and a static power consumption of only 120 μW. Silicon area for this OTA is 0.024mm².