• DocumentCode
    3357318
  • Title

    Buffer design for wide-area ATM networks using virtual finishing times

  • Author

    Hung, A. ; Kesidis, G.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
  • Volume
    3
  • fYear
    1995
  • fDate
    18-22 Jun 1995
  • Firstpage
    1901
  • Abstract
    This paper is concerned with the design of a class of priority buffering strategies suitable for public, wide-area ATM networks. We specify design goals for such strategies including ease of implementation and the ability to guarantee minimum bandwidths to individual buffers. Packetized generalized processor sharing is briefly discussed and a minimum-bandwidth result for self-clocked fair queueing is given. We revisit an approach originally proposed by L. Zhang (1991) and prove that it is appropriate for ATM. Some novel, related approaches are described and analyzed
  • Keywords
    B-ISDN; asynchronous transfer mode; buffer storage; queueing theory; wide area networks; B-ISDN; buffer design; ease of implementation; minimum bandwidths; packetized generalized processor sharing; priority buffering strategies; self-clocked fair queueing; virtual finishing times; wide-area ATM networks; Asynchronous transfer mode; B-ISDN; Bandwidth; Finishing; High-speed networks; Packet switching; Process design; Switches; Telecommunication traffic; Traffic control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Communications, 1995. ICC '95 Seattle, 'Gateway to Globalization', 1995 IEEE International Conference on
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    0-7803-2486-2
  • Type

    conf

  • DOI
    10.1109/ICC.1995.524528
  • Filename
    524528