DocumentCode :
3358445
Title :
RTD/HFET low standby power SRAM gain cell
Author :
van der Wage, P. ; Seabaugh, A. ; Beam, E., III
Author_Institution :
Corp. Res. Lab., Texas Instrum. Inc., Dallas, TX, USA
fYear :
1996
fDate :
8-11 Dec. 1996
Firstpage :
425
Lastpage :
428
Abstract :
A record low 50 nW III/V Tunneling-based SRAM (TSRAM) cell has been demonstrated by combining ultra-low current density resonant-tunneling diodes (RTDs) and heterostructure field effect transistors (HFETs) in one integrated process on an InP substrate. This represents well over two orders of magnitude improvement over previous III/V static memory cells. By increasing the number of vertically integrated RTDs, we have also obtained a 100 nW multi-valued memory cell with three stable states. The cell concept applies to any material system in which low current density negative differential resistance devices are available. An ultralow power one-transistor Si TSRAM cell based on DRAM is also described in anticipation of Si-based RTDs.
Keywords :
III-V semiconductors; SRAM chips; junction gate field effect transistors; negative resistance devices; resonant tunnelling diodes; 100 nW; 50 nW; HFET; III/V semiconductor; InP; InP substrate; RTD; current density; heterostructure field effect transistor; multi-valued memory cell; negative differential resistance device; resonant-tunneling diode; standby power; static memory cell; tunneling SRAM gain cell; vertical integration; Circuits; Current density; Diodes; HEMTs; Indium phosphide; Latches; MODFETs; Random access memory; Tin; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1996. IEDM '96., International
Conference_Location :
San Francisco, CA, USA
ISSN :
0163-1918
Print_ISBN :
0-7803-3393-4
Type :
conf
DOI :
10.1109/IEDM.1996.553618
Filename :
553618
Link To Document :
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