DocumentCode
3358498
Title
Digital filter design using subexpression elimination and all signed-digit representations
Author
Dempster, A.G. ; Macleod, M.D.
Author_Institution
Westminster Univ., London, UK
Volume
3
fYear
2004
fDate
23-26 May 2004
Abstract
We examine the application of Hartley´s subexpression elimination algorithm to sets of coefficients that are represented all combinations signed-digits including those that require more digits than CSD. FIR filters using this method can use fewer adders than those designed by the best of existing techniques. However, the search space for practical filters means that exhaustive searching is impractical.
Keywords
FIR filters; adders; digital arithmetic; digital filters; multiplying circuits; FIR filters; digital filters design; search space; signed-digit representations; subexpression elimination algorithm; Adders; Algorithm design and analysis; Costs; Digital filters; Finite impulse response filter; Logic circuits; Production; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1328710
Filename
1328710
Link To Document