DocumentCode :
3358606
Title :
An efficient wrapper scan chain configuration method for network-on-chip testing
Author :
Ming Li ; Wen-Ben Jone ; Qing-An Zeng
Author_Institution :
Dept. of Electr. & Comput. Eng. & Comput. Sci., Cincinnati Univ., OH
fYear :
2006
fDate :
2-3 March 2006
Abstract :
Network-on-chip (NoC) is the new paradigm for core-based system design. Reuse of the on-chip communication network for testing cores in a NoC-based system is critical to reduce test cost for this new architecture. However, many new challenging issues come up correspondingly. In this paper, we propose a test data transportation method with multiple data flit formats and a novel scan chain configuration method to maximize the utilization of the on-chip network channel without adding too much hardware overhead. Experimental results on ITC´02 benchmarks show that the new wrapper scan chain configuration method (with the aid of multiple data flit formats) leads to substantial reduction in network channel waste, and thus results in a significant overall reduction of time and energy for testing the entire system. The test wrapper architecture that supports the new method of test data transportation is very simple, and has been verified by VHDL simulation
Keywords :
integrated circuit testing; network-on-chip; core-based system design; multiple data flit formats; network-on-chip testing; on-chip communication network; on-chip network channel; test data transportation method; test wrapper architecture; wrapper scan chain configuration method; Benchmark testing; Circuit testing; Computer networks; Costs; Design engineering; Network-on-a-chip; Scheduling algorithm; System testing; System-on-a-chip; Transportation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Emerging VLSI Technologies and Architectures, 2006. IEEE Computer Society Annual Symposium on
Conference_Location :
Karlsruhe
Print_ISBN :
0-7695-2533-4
Type :
conf
DOI :
10.1109/ISVLSI.2006.21
Filename :
1602432
Link To Document :
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