DocumentCode
3359011
Title
Improving system level design space exploration by incorporating SAT-solvers into multi-objective evolutionary algorithms
Author
Schlichter, T. ; Lukasiewycz, M. ; Haubelt, C. ; Teich, J.
Author_Institution
Dept. of Comput. Sci., Erlangen-Nuremberg Univ., Erlangen
fYear
2006
fDate
2-3 March 2006
Abstract
Automatic design space exploration at the system level is the task of finding optimal or close to optimal mappings for a set of applications onto an optimized architecture. Especially, finding a feasible binding of processes onto resources that permit the communications imposed by data dependencies is known to be a NP-complete task which demands the use of heuristic optimization approaches. Nearly all optimization approaches known from literature will fail in design spaces containing only a few feasible solutions. In this paper, we propose a novel approach based on the combination of multi-objective evolutionary algorithms and SAT-solvers to overcome these drawbacks. We provide experimental results showing the efficiency of our novel methodology for synthetic and real life test cases
Keywords
circuit complexity; circuit optimisation; computability; evolutionary computation; NP-complete task; SAT solvers; automatic design space exploration; heuristic optimization; multiobjective evolutionary algorithms; system level design space exploration; Algorithm design and analysis; Boolean functions; Computer science; Data structures; Decoding; Design optimization; Embedded system; Evolutionary computation; Space exploration; System-level design;
fLanguage
English
Publisher
ieee
Conference_Titel
Emerging VLSI Technologies and Architectures, 2006. IEEE Computer Society Annual Symposium on
Conference_Location
Karlsruhe
Print_ISBN
0-7695-2533-4
Type
conf
DOI
10.1109/ISVLSI.2006.57
Filename
1602457
Link To Document