A 6.66-kHz, 940-nW, 56ppm/°C, fully on-chip PVT variation tolerant CMOS relaxation oscillator

Author

Tsubaki, Keishi ; Hirose, Tatsuya ; Osaki, Y. ; Shiga, S. ; Kuroki, Nobutaka ; Numa, Masahiro

Author_Institution

Dept. of Electr. & Electron. Eng., Kobe Univ., Kobe, Japan

fYear

2012

fDate

9-12 Dec. 2012

Firstpage

97

Lastpage

100

Abstract

A fully on-chip CMOS relaxation oscillator (ROSC) with a PVT variation compensation circuit is proposed in this paper. The circuit is based on a conventional ROSC and has a distinctive feature in the compensation circuit that compensates for comparator´s non-idealities caused by offset voltage and delay time. We also developed a bias circuit consisting of positive and negative temperature coefficient resistors to obtain the temperature compensated clock frequency. Measurement results demonstrated that the circuit can generate a stable clock frequency of 6.66 kHz. The power dissipation was 940 nW. The measured line regulation and temperature coefficient were 0.98%/V and 56ppm/°C, respectively.

Keywords

CMOS integrated circuits; comparators (circuits); relaxation oscillators; resistors; PVT variation compensation circuit; bias circuit; comparator; delay time; frequency 6.66 kHz; negative temperature coefficient resistors; offset voltage; on-chip CMOS relaxation oscillator; positive temperature coefficient resistors; power 940 nW; CMOS integrated circuits; Clocks; Delay; Frequency measurement; Generators; Oscillators; Temperature measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems (ICECS), 2012 19th IEEE International Conference on

Conference_Location

Seville

Print_ISBN

978-1-4673-1261-5

Electronic_ISBN

978-1-4673-1259-2

Type

conf

DOI

10.1109/ICECS.2012.6463790

Filename

6463790