DocumentCode :
3359175
Title :
ECONO: Express coherence notifications for efficient cache coherency in many-core CMPs
Author :
Abellan, Jose L. ; Ros, Alberto ; Fernandez, J. ; Acacio, M.E.
Author_Institution :
Electr. & Comput. Eng. Dept., Boston Univ., Boston, MA, USA
fYear :
2013
fDate :
15-18 July 2013
Firstpage :
237
Lastpage :
244
Abstract :
It is commonly stated that a directory-based coherence protocol is the design of choice to provide maximum performance in coherence maintenance for shared-memory many-core CMPs. Nevertheless, new solutions are emerging to achieve acceptable levels of on-chip area overhead and energy consumption to also meet scalability. In this work, we propose the Express COherence NOtification (ECONO) protocol, a coherence protocol aimed at providing high performance with minimal on-chip area and energy consumption for superior scalability. To maintain coherence, ECONO relies on express coherence notifications which are broadcast atomically over a dedicated lightweight and power-efficient on-chip network leveraging state-of-the-art technology. We implement and evaluate ECONO utilizing full-system simulation, a representative set of benchmarks, and compare it against two contemporary coherence protocols: Hammer and Directory. While ECONO achieves slightly better performance than Directory, our proposal does not need to encode sharer sets like in Hammer, saving significant on-chip area and energy even when considering the extra hardware resources required by ECONO. Projections for a 1024-core CMP reveal that, in comparison to one of the most scalable directory-based protocols to date, ECONO entails more than 2× less on-chip storage overhead while keeping with reasonable power dissipation.
Keywords :
cache storage; multiprocessing systems; shared memory systems; 1024-core CMP; ECONO protocol; cache coherency; directory-based coherence protocol; energy consumption; express coherence notifications; minimal on-chip area; power-efficient on-chip network leveraging state-of-the-art technology; shared-memory many-core CMP; superior scalability; Benchmark testing; Coherence; Complexity theory; Proposals; Protocols; System-on-chip; Tiles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013 International Conference on
Conference_Location :
Agios Konstantinos
Type :
conf
DOI :
10.1109/SAMOS.2013.6621128
Filename :
6621128
Link To Document :
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