Title :
A thermally stable Ti-W salicide for deep-submicron logic with embedded DRAM
Author :
Fujii, K. ; Kikuta, K. ; Inoue, K. ; Mikagi, K. ; Chikaki, S. ; Kikkawa, T.
Author_Institution :
ULSI Device Dev. Lab., NEC Corp., Kanagawa, Japan
Abstract :
A new titanium-tungsten (Ti-W) salicide process with high-thermal stability has been developed for deep-submicron logic with embedded DRAM. The sheet resistance of 14 /spl Omega///spl square/ for Ti-5at%W silicide on both 0.18 /spl mu/m gate and 0.35 /spl mu/m diffusion layers was achieved. This is the lowest resistivity (50 /spl mu//spl Omega/-cm) in C49-TiSi/sub 2/, and did not change during annealing at 800/spl deg/C for 1 hour. By adding W atoms in Ti, high-thermal stability of the metastable C49-TiSi/sub 2/ was obtained, so that the C49-TiSi/sub 2/ did not transform to the C54-TiSi/sub 2/ phase below 900/spl deg/C. 0.18 /spl mu/m CMOS transistors were successfully fabricated using the Ti-W salicide technology.
Keywords :
CMOS logic circuits; CMOS memory circuits; DRAM chips; MOSFET; ULSI; annealing; electrical resistivity; integrated circuit metallisation; semiconductor device metallisation; thermal stability; titanium compounds; tungsten compounds; 0.18 mum; 0.35 mum; 1 hour; 50 muohmcm; 800 C; CMOS transistors; RTA; TiWSi/sub 2/; deep-submicron logic; diffusion layers; embedded DRAM; furnace annealing; high-thermal stability; logic ULSIs; low resistivity; metastable C49-TiSi/sub 2/; sheet resistance; surface morphology; thermally stable Ti-W salicide; Annealing; CMOS logic circuits; CMOS technology; Furnaces; Logic devices; Random access memory; Silicides; Temperature; Thermal stability; Ultra large scale integration;
Conference_Titel :
Electron Devices Meeting, 1996. IEDM '96., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-3393-4
DOI :
10.1109/IEDM.1996.553624
