• DocumentCode
    3359872
  • Title

    IRDrop analysis in power delivery network design

  • Author

    Dai, Wenliang

  • Author_Institution
    Cadence Design Syst., Inc., Shanghai, China
  • fYear
    2009
  • fDate
    2-4 Dec. 2009
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper introduces a process that allows customers to do IRDrop analysis on the package/SiP and PCB level. The component information such as the package model, power consumption and voltage regulator module (VRM) as well as power delivery network circuit can be used at the package and board level to perform static IRDrop analysis. The power consumption is used to obtain the current excitation while the VRM pins are used to provide the power supply. For the complicated package and PCB geometry structure, the progressive mesh scheme is used to extract the DC circuit model for their power delivery network. In order to meet the tolerance of current and voltage drop, the required VRM and IC components locations as well as stackup can be optimized according to the voltage drop in DC domain. The user can also view the voltage drop, current and temperature rise.
  • Keywords
    power supply circuits; printed circuits; voltage regulators; DC circuit model; IRDrop analysis; PCB geometry structure; power consumption; power delivery network circuit; power delivery network design; progressive mesh scheme; voltage regulator module; Circuits; Energy consumption; Geometry; Information analysis; Packaging; Performance analysis; Pins; Power supplies; Regulators; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Design of Advanced Packaging & Systems Symposium, 2009. (EDAPS 2009). IEEE
  • Conference_Location
    Shatin, Hong Kong
  • Print_ISBN
    978-1-4244-5350-4
  • Electronic_ISBN
    978-1-4244-5351-1
  • Type

    conf

  • DOI
    10.1109/EDAPS.2009.5403974
  • Filename
    5403974