The Power of Exhaustive Bridge Diagnosis using IDDQ Speed, Confidence, and Resolution

A method is presented for high-speed diagnosis of all two-node bridging defects in a logic circuit using I_DDQ. The method is tractable for large industrial circuit designs, requiring less than two CPU minutes to evaluate the ten trillion bridging defects on a 4.5-million gate ASIC. More significant than the speed of the method, however, is the precise diagnostic resolution typically achieved when the list of bridge faults diagnosed is examined in light of the circuit´s physical layout. The robustness of the IDDQ bridge fault model and the near impossibility of matching a long I_DDQ signature by chance result in a confidence in the results rarely matched by diagnostic methods that must rely on modeling the logical behavior of a bridging defect. Performance data and results from physical failure analysis are presented for a variety of production ASIC designs