DocumentCode :
3360660
Title :
Session 17 - Clocking circuits
Author :
Fischette, Dennis ; Kimo Tam,
Author_Institution :
AMD, USA
fYear :
2008
fDate :
21-24 Sept. 2008
Abstract :
The first paper reports an all digital fractional-N PLL in state-of-the-art 45 nm SOI CMOS. The authors study the impact of various orders of feedback divider modulator on the period jitter.
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-2018-6
Type :
conf
DOI :
10.1109/CICC.2008.4672112
Filename :
4672112
Link To Document :
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