• DocumentCode
    3360703
  • Title

    Testable Design for Adaptive Linear Equalizer in High-Speed Serial Links

  • Author

    Lin, Mitchell ; Cheng, Kwang-Ting Tim

  • Author_Institution
    Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA
  • fYear
    2006
  • fDate
    Oct. 2006
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    This paper describes a novel DfT solution to the adaptive linear equalizer in the receiver of a high-speed serial link. We first summarize various equalization architectures, adaptive algorithms, circuit implementations, and their variations to which the proposed solution can be applied. The solution addresses the observability problem of the equalizer and results in a testable design that can be easily characterized and cost-effectively tested in the production line. To validate the proposed method, we conducted experiments for examples with various injected faults, for which the conventional approach of examining the eye opening at the output of the equalizer results in poor fault coverage. Simulation results demonstrate that the proposed method has a significantly higher coverage for those hard-to-detect faults
  • Keywords
    adaptive equalisers; automatic test equipment; design for testability; fault diagnosis; integrated circuit testing; DfT solution; adaptive linear equalizer; fault coverage; fault detection; high-speed serial links; testable design; Adaptive algorithm; Adaptive equalizers; Bandwidth; Circuit faults; Circuit testing; Clocks; Degradation; Intersymbol interference; Observability; Production;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2006. ITC '06. IEEE International
  • Conference_Location
    Santa Clara, CA
  • ISSN
    1089-3539
  • Print_ISBN
    1-4244-0292-1
  • Electronic_ISBN
    1089-3539
  • Type

    conf

  • DOI
    10.1109/TEST.2006.297698
  • Filename
    4079376