Improved Match-Line Test and Repair Methodology Including Power-Supply Noise Testing for Content-Addressable Memories

Author

Nadkarni, Rahul ; Arsovski, Igor ; Wistort, Reid ; Chickanosky, Valerie

Author_Institution

Internation Bus. Machines Corp., Essex Junction, VT

fYear

2006

fDate

Oct. 2006

Firstpage

1

Lastpage

9

Abstract

This paper describes a novel test and repair methodology for an embedded content-addressable memory (CAM) design. Exhaustive match-line testing is used to ensure correct search operation after manufacturing, while search margin testing is used to provide robust functionality for the life of the product. With CAM being one of the most power-hungry circuits on chip, it is also important to test the effects of CAM-induced power-supply noise. Programmable BIST patterns induce worst-case power-supply noise in the system and then test CAM sensitivity to it. Fails in the CAM are detected by BIST and repaired using row redundancy with word-line and match-line steering. Hardware results stress the importance of this test and repair methodology

Keywords

built-in self test; circuit noise; content-addressable storage; embedded systems; integrated circuit testing; logic testing; power supply circuits; CAM-induced power-supply noise; embedded content-addressable memory design; match-line steering; match-line testing; power-hungry circuits; power-supply noise testing; programmable BIST patterns; Built-in self-test; CADCAM; Circuit noise; Circuit testing; Computer aided manufacturing; Hardware; Life testing; Noise robustness; Stress; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2006. ITC '06. IEEE International

Conference_Location

Santa Clara, CA

ISSN

1089-3539

Print_ISBN

1-4244-0292-1

Electronic_ISBN

1089-3539

Type

conf

DOI

10.1109/TEST.2006.297700

Filename

4079378