Title :
A low-voltage OP amp with digitally controlled algorithmic approximation
Author :
Jee, Dong-Woo ; Park, Seung-Jin ; Park, Hong-June ; Sim, Jae-Yoon
Author_Institution :
Pohang Univ. of Sci. & Technol., Pohang
Abstract :
This paper presents a new architecture of digitally controlled algorithmic OP amp suitable for scaled CMOS technologies. With inverter-based gain stages and digitally-assisted damping control, the amplifier achieves high-gain and wide input/output ranges even at the minimally allowable supply voltage by digital circuits. The amplifier, implemented in a standard 0.18 mum CMOS, shows a DC gain of 73 dB and 95% settling time of 41 ns at 0.5 V step input.
Keywords :
CMOS analogue integrated circuits; digital control; operational amplifiers; digital circuits; digitally controlled algorithmic approximation; digitally-assisted damping control; low-voltage OP amp; scaled CMOS technologies; Approximation algorithms; CMOS technology; Damping; Digital circuits; Digital control; Frequency; Operational amplifiers; Steady-state; Switching circuits; Threshold voltage;
Conference_Titel :
Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-2018-6
Electronic_ISBN :
978-1-4244-2019-3
DOI :
10.1109/CICC.2008.4672131
