DocumentCode :
3361035
Title :
A Rapid Yield Learning Flow Based on Production Integrated Layout-Aware Diagnosis
Author :
Keim, Martin ; Tamarapalli, Nagesh ; Tang, Huaxing ; Sharma, Manish ; Rajski, Janusz ; Schuermyer, Chris ; Benware, Brady
Author_Institution :
Mentor Graphics Corp., Wilsonville, OR
fYear :
2006
fDate :
Oct. 2006
Firstpage :
1
Lastpage :
10
Abstract :
This paper presents a flow for using logic diagnosis to turn production material into vehicles for yield learning. High throughput logic diagnosis is combined with the newly emerging field of design for manufacturing to enable layout aware diagnosis. The ability of the flow to calculate feature failure rates and the application of the failure rates for yield learning is demonstrated through volume data analysis on a production ASIC
Keywords :
application specific integrated circuits; design for manufacture; fault diagnosis; integrated circuit testing; integrated circuit yield; logic testing; ASIC; design for manufacturing; failure rates; logic diagnosis; production integrated layout-aware diagnosis; production material; yield learning flow; Computational modeling; Design for manufacture; Failure analysis; Graphics; Large scale integration; Logic; Manufacturing; Production materials; Silicon; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2006. ITC '06. IEEE International
Conference_Location :
Santa Clara, CA
ISSN :
1089-3539
Print_ISBN :
1-4244-0292-1
Electronic_ISBN :
1089-3539
Type :
conf
DOI :
10.1109/TEST.2006.297715
Filename :
4079393
Link To Document :
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