Partial Reconfiguration of FPGAs for Dynamical Reconfiguration of a Software Radio Platform

In the context of a cognitive radio terminal we propose to use partial reconfiguration of FPGAs in order to obtain a enhanced wide band software radio platform. That means the reconfiguration should be performed dynamically (during the run time). Only partial reconfiguration of FPGAs could currently meet this requirement both in terms of power computing efficiency and reconfiguration speed. In this paper we show how it is possible to perform this type of behavior within an heterogeneous platform. We consider in detail three different situations illustrated with the three following examples: the dynamical reconfiguration of a convolutional coder, a constellation mapper, and a FIR filter.