DocumentCode
3361729
Title
Variability in 3-D integrated circuits
Author
Akopyan, Filipp ; Otero, Carlos Tadeo Ortega ; Fang, David ; Jackson, Sandra J. ; Manohar, Rajit
Author_Institution
Comput. Syst. Lab., Cornell Univ., Ithaca, NY
fYear
2008
fDate
21-24 Sept. 2008
Firstpage
659
Lastpage
662
Abstract
In recent years, there has been a trend among digital and analog circuit designers towards three-dimensional integration. There has been some debate regarding the applicability of 3-D technology to general logic circuits, especially with regard to thermal issues. We examine process variations on the same layer, across layers, and cross-chip variations. We show how the performance of each layer of the 3-D chip varies with temperature, and demonstrate the effect of heat pipes on circuit performance.
Keywords
heat pipes; integrated circuit packaging; integrated logic circuits; thermal management (packaging); 3D chip; 3D integrated circuits; heat pipes; logic circuits; Asynchronous circuits; Degradation; Delay; Integrated circuit interconnections; Logic circuits; Manufacturing; Silicon on insulator technology; Temperature; Three-dimensional integrated circuits; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-2018-6
Electronic_ISBN
978-1-4244-2019-3
Type
conf
DOI
10.1109/CICC.2008.4672172
Filename
4672172
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