Title :
Role of test in yield learning for 65 nm and beyond
Author_Institution :
Credence Syst. Corp., Milpitas, CA
Abstract :
This panel will examine a range of yield issues that have a direct impact of test in yield learning. It will have a cross-industry presentation with executives from (a) Cadence, (b) leading YMS software provider, (c) leading ATE provider, (d) leading IDM customer, (e) leading fables s customer and (f) leading foundry
Keywords :
automatic test equipment; integrated circuit yield; 65 nm; automatic test systems; semiconductor industry; yield learning; Analog circuits; Circuit testing; Condition monitoring; Electronic design automation and methodology; Geometry; Lithography; Logic devices; Logic testing; System testing;
Conference_Titel :
Test Conference, 2006. ITC '06. IEEE International
Conference_Location :
Santa Clara, CA
Print_ISBN :
1-4244-0291-3
DOI :
10.1109/TEST.2006.297769
